Elastic memory with arrangement for reducing phase fluctuations

Details Elastic memory with arrangement for reducing phase fluctuations Elastic memory with arrangement for reducing phase fluctuations

1982-06-22

1983-12-27

Hecker, Stuart N.

Static information storage and retrieval

Addressing

Sync/clocking

365189, G11C 700, G11C 800

Patent

active

044234937

ABSTRACT:
An arrangement for reducing phase fluctuations in the output or reading clock pulse of elastic memories which are produced during the absence and return of the external input clock pulse. According to the invention, the writing and reading clock pulses are replaced immediately upon the absence of the external input clock pulse by a clock pulse generated at the desired frequency fo so that the minimum distance between the written-in memory cell and the read-out memory cell remains in effect even for the time of the operating malfunction and no additional regulating processes are required when the external input clock pulse re-appears.

REFERENCES:
patent: 3671776 (1972-06-01), Houston
patent: 4151609 (1979-04-01), Moss
patent: 4287577 (1981-09-01), Deal
CCITT Org. Book, vol. III-2, Sec. 7, 1977, pp. 447-450.
Weiss, "Digitaler Multiplexer Zweiter Ordnung DMX-8 von 8448 k Bit/s mit Positiver Stopftechnik," Hasler-Mitteilungen, 11/1/78, pp. 14-23.
TCM 2401, Preliminary Data Sheet, Texas Instruments, 1980, May 28.

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