Elastic buffer

Pulse or digital communications – Spread spectrum – Direct sequence

Patent

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Details

375118, 365220, 36523003, H04L 700, H04L 2536

Patent

active

052934098

ABSTRACT:
Communication of digital information between digital systems (2, 3) comprising clock generators (8, 9) is effected via storage in memory locations a1 to a8 and b1 to b8 of a cyclic buffer 4, in which, in succession, the information is written and read on a time base determined by the various clock generators (8, 9). Pointers stored in pointers (12, 13) determine the memory locations to be read out or written. If the pointers have become equal as a result of phase deviations of the clock generators (8, 9), this is detected by an address distance monitoring means (14) and made unequal and set to a maximum difference value relative to each other. The difference value amounts to half the number of memory locations n in a row of the buffer 4. For full duplex transmission the buffer 4 preferably comprises a double row of memory locations a1-an and b1-bn respectively.

REFERENCES:
patent: 3569632 (1971-03-01), Beresin
patent: 3867579 (1975-02-01), Colton et al.
patent: 4434498 (1984-02-01), Mathieu
patent: 4755971 (1988-07-01), Jasmer et al.

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