EL element drive circuit and display panel

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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Details

C345S076000, C345S077000, C345S055000

Reexamination Certificate

active

06737813

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit for driving an electroluminescence element which emits light by injecting a current thereinto.
2. Related Background Art
An electroluminescence element (hereinafter referred to as an EL element) is applied to a display panel type image display system in which a plurality of pixel display circuits including the EL elements are arranged in matrix (hereinafter referred to as a display panel), and the like. In general, the display panel has a large area, so that it cannot be formed on a single crystalline silicon substrate. Thus, the display panel is produced by a process of forming thin film transistors (TFTs) on a glass substrate.
For the EL element drive circuit, there are mainly two kinds of systems, a voltage setting system and a current setting system.
(Voltage Setting System)
First, a voltage setting system will be described using FIG.
9
.
FIG. 9
is a circuit diagram of a general pixel display circuit using the voltage setting system.
A signal supply line Video for inputting an image signal is connected with a source electrode (M
15
/S) of a MOS transistor M
15
(MOS transistor is indicated by an abbreviation of M in this specification) whose gate electrode is controlled according to a control pulse P
6
(in this specification, the source electrode, the drain electrode, and the gate electrode of the MOS transistor are indicated by abbreviations of /S, /D, and /G, respectively) The drain electrode of M
15
(M
15
/D) is connected with one end of a capacitor C
2
. The other end of the capacitor C
2
is connected with a capacitor C
1
whose end is connected with a power source VCC, the gate electrode of M
1
(M
1
/G) whose source electrode is connected with the power source VCC, and M
17
/S whose gate electrode is controlled according to a control pulse P
5
. M
1
/D and M
17
/D are connected with M
16
/S whose gate electrode is controlled according to a control pulse P
4
. M
16
/D is connected with a current injection terminal of an EL element. The other terminal of the EL element is connected with a ground GND.
A large number of pixel display circuits
1
are arranged in a display panel. In the case of, for example, QVGA (320×240), the signal supply line Video is led to and connected with 240 pixel display circuits
1
. The control pulses P
4
to P
6
are led to and connected with 320 pixel display circuits
1
.
The operation of the pixel display circuit
1
shown in
FIG. 9
will be described using time charts in
FIGS. 10A
to
10
E.
FIGS. 10A
to
10
E are voltage state charts with respect to the signal supply line Video, the control pulse P
4
, the control pulse P
5
, the control pulse P
6
, and M
1
/G, respectively.
(Before Time t
0
)
A voltage on the signal supply line Video is a signal level Vv(n−1) for light emission setting of the pixel display circuits
1
located on a preceding line. Because P
4
=L, P
5
=H, and P
6
=H, M
15
is in an OFF state, M
16
is in an ON state, and M
17
is in an OFF state. Thus, a voltage of M
1
/G is kept to a voltage Vd# charged in the capacitor C
1
by previously controlling the corresponding pixel display circuit
1
. A current determined according to the voltage Vd# is injected into the EL element, so that EL element emits light.
(At Time t
0
)
P
4
becomes H and P
6
becomes L. Thus, M
15
becomes an ON state and M
16
becomes an OFF state. Subsequently, the signal supply line Video is set to a black level Vbk (maximum voltage). Subsequently, P
5
is set to L, so that M
17
is turned ON. At this time, M
1
becomes a self discharge state. Thus, the capacitor C
1
is discharged, so that a voltage of M
1
/G is increased.
Now, a current-voltage characteristic of a MOS transistor can be substantially indicated by a pentode characteristic of the equation (1):
Ids
=
k
×
Δ



V
Δ



V
=
Vgs
-
Vth
]
(
1
)
where symbol Ids denotes a drain current, k denotes a drive coefficient, Vgs denotes a gate-source voltage, and Vth denotes a threshold voltage.
As can be understood from the equation (1), when Vgs approaches Vth, Ids becomes smaller. Thus, the self discharging operation of M
1
becomes weaker. Therefore, as shown in
FIG. 10E
, the voltage of M
1
/G asymptotically approaches Vth. Further, the capacitor C
2
is discharged such that a voltage between terminals becomes (Vcc−Vth−Vbk).
(At Time t
1
)
Because P
5
becomes H, M
17
becomes an OFF state. Subsequently, because P
4
becomes L, M
16
becomes an ON state. Subsequently, the voltage on the signal supply line Video is reduced to a desirable level Vv(n), so that the voltage of M
1
/G is reduced by a voltage dv(n) indicated by the equation (2).
dv
(
n
)=[
C
2
÷(
C
1
+
C
2
)]×
Vv
(
n
)  (2)
In the equation (2), symbols C
1
and C
2
denote electric capacitances of the capacitors C
1
and C
2
.
The voltage dv(n) is basically independent on a transition speed of Vv(n). The voltage dv(n) corresponds to &Dgr;V in the equation (1). Thus, a current is injected into the EL element through the transistor M
1
.
(At Time t
2
)
Because P
6
becomes H, M
15
becomes an OFF state. Subsequently, a current is injected into the EL element through the transistor M
1
, so that light emitting operation is continued until the next light emission setting operation. After the time t
2
, the same light emission setting operation is conducted for the pixel display circuits
1
located on the next row.
In the light emission setting operation of the pixel display circuit
1
shown in
FIG. 9
as described above, M
1
/G is temporarily reset to a black level as the voltage Vth, and then a set voltage Vv is inputted thereto. Thus, the error voltage dv(n) for producing a drive current which is indicated by the equation (2) can be set in M
1
/G. Thus, an injection current into the EL element can be set without being affected by a variation in Vth which is promoted by a TFT process for the transistor M
1
in each pixel display circuit
1
of the display panel and a variation in potential of each power source VCC which results from a wiring resistance.
(Current Setting System)
Next, a current setting system will be described using FIG.
6
.
FIG. 6
is a circuit diagram of a general pixel display circuit using the current setting system.
An image signal current obtained by converting an input image voltage signal into a current signal by a signal supply circuit is inputted to the signal supply line Video. The signal supply line Video is connected with M
4
/S whose gate electrode is controlled according to a control pulse P
2
. M
4
/D is connected with M
2
/D whose source electrode is connected with the power source VCC and M
3
/S whose gate electrode is controlled according to a control pulse P
1
. M
2
/G is connected with a capacitor C
1
whose one end is connected with the power source VCC, M
3
/D, and M
1
/G whose source electrode is connected with the power source VCC. M
1
/D is connected with the current injection terminal of the EL element. The other terminal of the EL element is grounded (GND).
The operation of the pixel display circuit
1
shown in
FIG. 6
will be described using time charts in
FIGS. 7A
to
7
E.
FIGS. 7A
to
7
E show the current image signal, the control pulse P
1
, the control pulse P
2
, and a voltage of M
1
/G, respectively, which are supplied to the signal supply line Video.
(Before Time t
0
)
A current on the signal supply line Video becomes a set current Id(n−1) into the pixel display circuits
1
located on a preceding line. In addition, because P
1
=H and P
2
=L, M
3
becomes an OFF state and M
4
becomes an OFF state. A voltage Vd#(n) determined by the previous light emission setting operation is applied from the power source VCC to M
1
/G. Thus, an output current from M
1
which is determined according to Vd#(n) is injected into the corresponding EL element, so that the EL element emits light.
(At Time t
0
)
A curr

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