EFM modulator for controlling digital sum variation of encoded d

Details EFM modulator for controlling digital sum variation of encoded d EFM modulator for controlling digital sum variation of encoded d

1993-10-18

1996-01-23

Hoff, Marc S.

Coded data generation or conversion

Digital code to digital code converters

To or from minimum d.c. level codes

341 95, H03M 500

Patent

active

054868270

ABSTRACT:
A modulator suppressing a low-frequency component of a recording waveform while limiting maximum and minimum recording wavelengths, comprising a margin bit generating circuit for generating a most suitable margin bit pattern based on a signal concerning a final recording waveform level of each of n channel bit patterns to be put before a margin bit pattern to be inhibited, control signals concerning a polarity of a cumulative digital sum variation, a control signal coming from a digital sum variation integrating circuit to switch between gains by detecting a magnitude of an absolute value of the digital sum variation, and a signal concerning the cumulative digital sum variation of each of the n channel bit patterns to be put after the above-mentioned margin bit pattern.

REFERENCES:
patent: 4728929 (1988-03-01), Tanaka
patent: 5136436 (1992-08-01), Kahlman
patent: 5196848 (1993-03-01), Sakazaki
patent: 5304997 (1994-04-01), Konno
patent: 5349349 (1994-09-01), Shimizume
patent: 5365231 (1994-11-01), Niimura
Patent Abstracts of Japan vol. 12, No. 174 (E-612) 24 May 1988 & JP-A-62 281 523 (Matsushita) 7 Dec. 1987.

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