EFL Logic arrays

Details EFL Logic arrays EFL Logic arrays

1980-09-29

1983-03-29

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307241, 307248, 307467, H03K 1762, H03K 19086

Patent

active

043785085

ABSTRACT:
A logic gate is formed as a full 3-EFL circuit including a full two-level ECL current switch tree and an EFL stage made up of input and output multiemitter transistors. By appropriate connections, the logic gate may be used for a variety of circuits including a 4:1 multiplexer and a comparator of two three-digit binary numbers. The logic gate advantageously is formed in a silicon chip which includes an array of cells each consisting essentially of nine single-emitter transistors, two four-emitter transistors and a number, advantageously nine, of resistors.

REFERENCES:
patent: 3783307 (1974-01-01), Breur
patent: 3795822 (1974-03-01), Skokan
patent: 4041326 (1977-08-01), Robinson
patent: 4145623 (1979-03-01), Doucette
patent: 4237387 (1980-12-01), Devendorf et al.
Skokan, IEEE Journal of Solid-State Circuits; pp. 356-361; vol. SC-8, No. 5; 10/1973.
Kane, IEEE Journal of Solid-State Circuits; pp. 669-678; vol. SC-11, No. 5; 10/1976.

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