Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1998-01-09
2000-03-14
Mai, Tan V.
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
708492, G06F 758, G06F 700
Patent
active
060385774
ABSTRACT:
Method and apparatus for efficiently producing a delayed version of a maximum length sequence output from a linear feedback shift register. Polynomial (vector) exponentiation is performed instead of matrix exponentiation to calculate the mask coefficients which yield the delayed sequence from the linear feedback shift register. Polynomial (vector) operations are much simpler and faster than the corresponding matrix operations and require substantially less circuitry and computational effort. Modulo exponentiation of polynomials is done by repeated squaring and shifting, and a division circuit built on a linear feedback shift register is provided to perform an efficient modulo squaring of polynomials.
REFERENCES:
patent: 5105376 (1992-04-01), Pedron
patent: 5206824 (1993-04-01), Arazi
patent: 5446745 (1995-08-01), Gibbs
Shift Register Connections for Delayed Versions of m Sequences, A.N. Van Luyn, Electronics Letters, vol. 14, No. 22, Oct. 1978.
A Simple Method for the Determination of Feedback Shift Register Connections for Delayed Maximal Length Sequences, Yiu Proceedings of the IEEE, vol. 68, No. 4, Apr. 1980.
DSPC Israel Ltd.
Friedman Mark M.
Mai Tan V.
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