Efficient pixel packing

Computer graphics processing and selective visual display system – Computer graphics processing – Attributes

Reexamination Certificate

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Details

C345S549000, C345S545000

Reexamination Certificate

active

06538662

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to storing pixel data in video memory and more specifically to storing eight twenty-four bit pixels within three quad words of video memory.
2. Description of the Related Art
The amount of video memory required to hold an image depends on the resolution of the image and color depth used per pixel. To display a true color image generally uses twenty-four bits of data per pixel. The twenty-four bits that make-up a true color pixel include eight bits for each of a red, green, and blue (RGB) signal. Most addressing schemes address video memory eight, sixteen, or thirty-two bits at a time.
Traditionally, when twenty-four bit pixel data was stored in video memory (that was addressed thirty-two bits at a time) eight bits of video memory per pixel were unused. This was because it was desirable (to avoid the addition of hardware to reorient the pixel data) to store the twenty-four bit pixel data on a double word boundary. In an effort to fully utilize video memory, various schemes were devised which allowed data for an individual pixel to possibly be stored in a different double word (thirty-two bits) within video memory. One such scheme stored twenty-four bit RBG pixel data sequentially in video memory. Utilizing this scheme, a twenty-four bit RGB pixel was stored on an upper and lower boundary of every three double words (ninety-six bits) of video memory. This scheme required the implementation of extensive hardware to reorient the RGB pixel data when read from video memory, before display.
SUMMARY OF THE INVENTION
A system according to the present invention provides a technique that efficiently packs eight twenty-four bit pixels into three quad words of video memory. This is accomplished by dividing two of the eight twenty-four bit pixels into constituent eight bit representations of each of three primary pixel colors. Two undivided pixels and two of the constituent eight bit representations of the divided pixels are stored within each of the quad words. In one embodiment, each of the two undivided pixels is stored on a double word boundary.
An advantage of the disclosed embodiment is that it simplifies the hardware required to reorient the pixel data, before display, while maintaining efficient packing of twenty-four bit pixel data.


REFERENCES:
patent: 5696945 (1997-12-01), Seiler et al.
patent: 5742298 (1998-04-01), Bril et al.
patent: 5812147 (1998-09-01), Hook et al.

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