Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
2008-01-29
2008-01-29
Shah, Chirag G. (Department: 2616)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S374000, C370S395700, C370S428000
Reexamination Certificate
active
07324509
ABSTRACT:
A communication device configured to assign a data packet to a memory bank of a memory device is provided. The communication device includes an input port for receiving the data packet, a look-ahead logic module, a pointer assignment module, and an output port. The look-ahead logic module is configured to select an address of the memory bank of the memory device by overriding an address mapping scheme that permits successive data packets to be assigned to the same memory bank. The pointer assignment module is configured to assign a pointer to the data packet based upon the memory bank determined by the look-ahead logic module. In addition, the output port is configured to transfer the data packet to the memory bank of the memory device.
REFERENCES:
patent: 5182801 (1993-01-01), Asfour
patent: 5313603 (1994-05-01), Takishima
patent: 5390308 (1995-02-01), Ware et al.
patent: 5423015 (1995-06-01), Chung
patent: 5634015 (1997-05-01), Chang et al.
patent: 5644784 (1997-07-01), Peek
patent: 5701434 (1997-12-01), Nakagawa
patent: 5742613 (1998-04-01), MacDonald
patent: 5802543 (1998-09-01), Shibayama
patent: 5898687 (1999-04-01), Harriman et al.
patent: 5905725 (1999-05-01), Sindhu et al.
patent: 6061351 (2000-05-01), Erimli et al.
patent: 6175902 (2001-01-01), Runaldue et al.
patent: 6490248 (2002-12-01), Shimojo
patent: 6724767 (2004-04-01), Chong et al.
patent: 6745277 (2004-06-01), Lee et al.
patent: 6853643 (2005-02-01), Hann et al.
patent: 6970478 (2005-11-01), Nishihara
patent: 2004/0028067 (2004-02-01), Chong et al.
patent: 2004/0215903 (2004-10-01), Barri et al.
patent: 99/00939 (1999-01-01), None
Lin, Yu-Sheng and Shung, C. Bernard, “Queue Management for Shared Buffer and Shared Multi-buffer ATM Switches”, Department of Electronics Engineering & Institute of Electronics, National Chiao Tung Univeristy, Hsinchu, Taiwan, R.O.C., Mar. 24, 1996.
Broadcom Corporation
Shah Chirag G.
Squire Sanders & Dempsey L.L.P.
LandOfFree
Efficient optimization algorithm in memory utilization for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Efficient optimization algorithm in memory utilization for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Efficient optimization algorithm in memory utilization for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2753901