Efficient multi-chip GPU

Details Efficient multi-chip GPU Efficient multi-chip GPU

2006-06-16

2009-11-10

Brier, Jeffery A (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphic processing system

Plural graphics processors

Reexamination Certificate

active

07616206

ABSTRACT:
One embodiment of the invention sets forth a technique for efficiently combining two graphics processing units (“GPUs”) to enable an improved price-performance tradeoff and better scalability relative to prior art multi-GPU designs. Each GPU's memory interface is split into a first part coupling the GPU to its respective frame buffer and a second part coupling the GPU directly to the other GPU, creating an inter-GPU private bus. The private bus enables higher bandwidth communications between the GPUs compared to conventional communications through a PCI Express™ bus. Performance and scalability are further improved through render target interleaving; render-to-texture data duplication; data compression; using variable-length packets in GPU-to-GPU transmissions; using the non-data pins of the frame buffer interfaces to transmit data signals; duplicating vertex data, geometry data and push buffer commands across both GPUs; and performing all geometry processing on each GPU.

REFERENCES:
patent: 7525548 (2009-04-01), Azar et al.
patent: 2006/0267992 (2006-11-01), Kelley et al.
patent: 2007/0103590 (2007-05-01), Azar et al.
patent: 2007/0139422 (2007-06-01), Kong et al.
patent: 2007/0139423 (2007-06-01), Kong et al.

Affiliated with

Also associated with

Rating

Efficient multi-chip GPU does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Efficient multi-chip GPU, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Efficient multi-chip GPU will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4105907