Efficient method and apparatus for parallel processing for...

Pulse or digital communications – Receivers – Angle modulation

Reexamination Certificate

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Reexamination Certificate

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10606724

ABSTRACT:
An apparatus and method provides efficient parallel processing for use with a single-bit sampler that provides single-bit samples at a high sample rate. A serial-to-parallel converter converts the single-bit samples into parallel single-bit samples at a reduced sample rate. A digital quadrature mix performs a frequency shift to the parallel single-bit samples and simultaneously performs a real-to-complex conversion of the parallel single-bit samples from the serial-to-parallel converter to provide parallel I and Q output values at an intermediate frequency. The serial-to-parallel converter has shift register stages that provide a memory for use in functional realization of a boxcar filter and decimation-by-two in the digital quadrature mix. The digital quadrature mix utilizes logic to route and invert the parallel single-bit samples resulting in the parallel I and Q single-bit output values. Additional filter and decimate stages may be used to process the parallel I and Q single-bit output values.

REFERENCES:
patent: 6442216 (2002-08-01), McLaughlin et al.
patent: 6449244 (2002-09-01), Loseke
patent: 7079061 (2006-07-01), Schuurmans
patent: 2003/0005008 (2003-01-01), Gray

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