Efficient low pass filter stage for a decimation filter

Details Efficient low pass filter stage for a decimation filter Efficient low pass filter stage for a decimation filter

1995-09-29

2001-10-30

Moise, Emmanuel L. (Department: 2133)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

06311201

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention pertains to decimation filters, and, more particularly, to low pass filtering in decimation filters.
BACKGROUND OF THE INVENTION
Decimation filters are used to convert a relatively high speed serial data stream, such as from a delta sigma modulator, and to a slower bit rate, wide word data. In the process of this decimation, certain advantageous filtering operations also occur.
One problem which is present in prior art decimation filters is that noise at frequencies above the base signal are aliased into the base signal, and once the noise is aliased into the base signal, it cannot be removed by conventional filtering techniques.
It can therefore be appreciated that a decimation filter which efficiently filters high frequency noise is highly desirable.
SUMMARY OF THE INVENTION
It is, therefore, an object of this invention to provide a decimation filter which efficiently filters high frequency noise.
Shown in an illustrated embodiment of the invention is a stage of a decimation filter which provides a filtering operation with multiple zeros at multiple frequencies and which operates at the highest sample rate of the decimator.
Further shown in an illustrated embodiment of the invention is a stage of a decimation filter in which a serial data input stream is filtered by summing the true or complement of selected bits of the data stream during each sampling period to provide a multiple zero filter characteristic.


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