Efficient implementation of multiprecision arithmetic

Details Efficient implementation of multiprecision arithmetic Efficient implementation of multiprecision arithmetic

2006-01-17

2006-01-17

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S710000

Reexamination Certificate

active

06988121

ABSTRACT:
The present invention provides an efficient implementation of multiprecision arithmetic, such as for a microprocessor. For example, an implementation of multiprecision arithmetic is provided that eliminates condition codes, such as condition codes for a carry bit and a borrow bit, and eliminates an add-with-carry instruction for multiprecision addition and a subtract-with-borrow instruction for multiprecision subtraction. In one embodiment, a method includes separately performing a first one or more arithmetic operations and a second one or more arithmetic operations. The second arithmetic operations indicate if the first arithmetic operations cause a carry condition or if the first arithmetic operations cause a borrow condition. The one or more results of the first and second arithmetic operations are then provided. The first and second arithmetic operations can be executed in parallel on a microprocessor.

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