Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
Reexamination Certificate
2008-04-29
2008-04-29
Li, Aimee J. (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to accommodate variable length...
C712S227000
Reexamination Certificate
active
09704467
ABSTRACT:
In one embodiment, a state machine receives a plurality of instructions from an instruction register to be processed by a digital signal processor. After receiving a single RTI, the state machine loads each of the plurality of instructions one at time and determines the validity of each instruction. If the instruction is valid, the state machine transfers the instruction to the decoder. If the instruction is invalid or if a no-operation instruction is present, the state machine discards the instruction and immediately loads the next instruction.
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Instant Web's Free On-line Computing Dictionary. © 1998. http://www.instantweb.com/foldoc/foldoc.cgi?computer+dictionary Search Term: State Machine.
Machine translation of Japanese Publication No. 07-084781 from the Japanese Patent Office (7 pages).
Machine translation of Japanese Publication No. 10-222391 from the Japanese Patent Office ( 10 pages).
Dinh Tien
Overkamp Gregory A.
Roth Charles P.
Singh Ravi P
Analog Devices Inc.
Fish & Richardson P.C.
Li Aimee J.
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