Efficient current feedback buffer

Details Efficient current feedback buffer Efficient current feedback buffer

2001-05-25

2003-02-25

Mis, David C. (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

C331S008000, C331S034000, C331S057000, C331S17700V, C327S109000, C327S156000, C327S157000

Reexamination Certificate

active

06525613

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to power supplies, and more particularly the present invention relates to buffered current-feedback power supplies useful for integrated circuits made from semiconductors. Power supplies desirably include feedback mechanisms from a load using a power supply, so as to deliver the proper amount of power under the proper conditions. Typically, feedback is achieved by either voltage or current control. Voltage is used because it generally is available with no more effort or circuitry than a voltage divider. Voltage feedback tends to be more useful when there is some possibility that the load will cause a voltage swing, such as a drop in voltage when a heavy load is applied or a spike when a load is suddenly removed.
In many small-scale micro-electronics applications, such as very-large scale integration (VLSI), power for power supplies is available only under 5 volts, sometimes as low as 2.5 V or 1.5 V. This is partly to accommodate the ever-smaller dimensions of transistors used in VLSI devices, such as those made by complementary metal-oxide semiconductor (CMOS) processes. To fit more transistors onto silicon wafers, the distances from source or drain to gate become smaller and smaller, along with the ability of these transistors to resist voltage breakdown. As a result, lower and lower voltages are used. When a need arises for feedback, a power supplies typically provide only voltage feedback. Voltage feedback designs deprive these circuits of part of the limited voltage available.
In the power supply depicted in
FIG. 1
, a voltage supply
10
is connected at its positive and negative terminals to an amplifier having voltage feedback. The amplifier includes a current mirror amplifier
12
, a second stage amplifier
14
, and a third stage, a buffer amplifier
16
. The amplifier has a first stage current mirror
12
and differential amplifier
20
, responsive to an input signal
18
, such as from a loop filter or charge pump, and a voltage feedback signal
21
. By current mirror is meant that the two transistors
13
,
15
have a common gate and a common source so that they will conduct currents having a magnitude set by the relative sizes of the transistors. The current mirror first stage is responsive to a differential amplifier
20
. The first stage current mirror
12
provides output power to a second amplifier
14
, and then to a buffer, source follower
16
. The voltage output
34
is then connected to a voltage controlled oscillator (VCO, not shown).
The power supply has current sources
24
,
28
,
30
responsive to references signals
22
,
26
and
32
, at the various stages of gain. The voltage feedback signal
21
to the differential amplifier provides feedback to the amplifier to increase or decrease its output. One significant drawback to this voltage feedback design is that the minimum input voltage is limited by the tail current source
22
of the input differential amplifier and the gate-to-source voltages of the input transistors of the input differential amplifier
20
. In one example the lowest input voltage value is 0.8 V and the highest value is 1.8 volts. To demonstrate, the positive voltage rail from the voltage supply
10
is about 1.8 volts. There is a drop of 0.55 volts gate-to-source voltage (V
gs
) in the input transistor amplifier
20
and about 0.25 volts drain-to-source (V
DS
) in the tail current source
22
. Thus, the minimum input voltage is 0.55+0.25= about 0.8 volts.
The maximum output voltage is limited by the V
DS
of the second gain stage
14
and the V
DS
of the NMOS source follower
16
, whose voltage equals the voltage of the output
34
. The V
DS
of the second stage
14
is less than 0.1 volts and the V
gs
of the source follower
16
is a little more than 0.5 volts. Therefore, the maximum output voltage is about 0.6 volts less than the positive power supply voltage. In this case, the maximum output voltage is therefore about 1.2 volts. If this voltage feedback amplifier is used in unity gain configuration (as shown in FIG.
1
), the operating range will be between 0.8 V to 1.2 V, to ensure that both input stages and output stages are operating in well-defined operating areas.
In a typical voltage controlled oscillator (VCO), the desired output voltage range may vary from 0.6 volts to 1.8 volts, far outstripping the capability of the circuit of FIG.
1
. Additionally, this particular design uses 9 transistors and a capacitor, and has a three-stage amplifier. A simpler design not requiring as many components and able to vary the input and output voltage ranges is needed. Such a design will be compatible with a wide range of present devices, including charge pumps and voltage controlled oscillators.
BRIEF SUMMARY
The present invention meets these needs by providing a buffered power supply for CMOS devices that uses a current feedback design rather than a voltage feedback design. In one embodiment, a power supply has a first and a second transistor connected in series, the source of the first transistor being connected to the drain of the second transistor, the point of connection being a first point of connection in the circuit. A third transistor has a gate connected to the first point of connection, and the drains of the first and third transistors are then connected to a positive voltage supply. A drain of a fourth transistor is then connected to the source of the third transistor forming a second point of connection. The second point of connection is an output for a voltage to an electronic device, such as a VCO. In this configuration, the third transistor is a principal current source for the VCO, and the fourth transistor is a source follower or buffer for the third transistor. A fifth transistor is then connected at a third point of connection to the sources of the third and fourth transistors, and the source of the fifth transistor is then connected to the negative or return portion of the voltage supply. The first and second transistors provide a negative feedback loop for the power supply. While the embodiments are termed power supplies, it is understood that the embodiments generate a supply and control voltage for a VCO or other device. The current feedback gives the embodiments greater voltage ranges and greater control in operation.
Another embodiment is a power supply having a first transistor connected to a positive voltage supply, and second and third transistors connected to the first transistor at a first point of connection. The second transistor is connected to the first as a source follower. The source of the second transistor forms a second point of connection with a fourth transistor and with an output to an electronic device, such as a VCO. The third transistor is connected in series with the second transistor, and its drain forms a third point of connection with the gate of the fourth transistor and a drain of a fifth transistor. The fourth and fifth transistors are a main current source and a current source for the power supply, and are connected to the negative or return of the voltage supply. The third and fifth transistors provide a negative feedback loop for the power supply. Many other embodiments are also possible.


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“Synchronous Recording Channels—PRML & Beyond”, rev. 5.61 14.E.18, 1999, published by Knowledge Tek, Inc., Broomfield, Colorado.
“PRML: Seagate Uses Space Age Technology” available on the Internet at http://www.seagate.com/support/kb/disc/prml.ht

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