Efficient combined array for 2n bit n bit multiplications

Details Efficient combined array for 2n bit n bit multiplications Efficient combined array for 2n bit n bit multiplications

1996-10-18

1999-03-09

Ngo, Chuong Dinh

Boots, shoes, and leggings

36476001, G06F 752

Patent

active

058809856

ABSTRACT:
In order to multiply operands of different binary lengths using a common combined array, for example to do both 8 bit by 8 bit and 16 bit by 16 bit multiplications, 2.sup.m-1 multiplications are performed, where m is equal to the number of different bit lengths it is desired to multiply. For example, where 8.times.8 bit and 16.times.16 bit multiplications are done, 2 different multiplications are done. Each multiplication is an n.times.n/2.sup.m-1 multiplication, e.g., a 16.times.8 bit multiplication. Sign correction is performed by adding a correction vector or by modifying one of the partial products. The results of the multiplications are added together to obtain a 2 n bit result. Groups of bits from said 2 n result are selected depending on the length of the operands being multiplied.

REFERENCES:
patent: 4817029 (1989-03-01), Finegold
patent: 4825401 (1989-04-01), Ikumi
patent: 5446651 (1995-08-01), Moyse et al.
patent: 5521856 (1996-05-01), Shiraishi

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