Efficient coding/decoding apparatuses for processing digital ima

Details Efficient coding/decoding apparatuses for processing digital ima Efficient coding/decoding apparatuses for processing digital ima

1992-04-24

1994-05-24

Coles, Sr., Edward L.

Television

Bandwidth reduction system

Data rate reduction

348416, 348409, H04N 712

Patent

active

053153260

ABSTRACT:
Efficient coding decoding apparatuses are permitted to easily carrying out, without degradation of the picture quality, random access, high speed search or image editing necessary in media of the storage system in a processing system for recording, transmitting, and displaying a digital signal, and to efficiently encode/decode an image signal with a lesser quantity of codes. An original image signal from a terminal (1) is coded by an orthogonal transformer (4) and a quantizer (36). A subtracter (33) subtracts, from the original image signal, a reproduced image signal obtained by an inverse quantizer (7) and an inverse orthogonal transformer (10) to provide a negative error signal. An adder (30) adds a negative error signal delayed by one frame and multiplied by a predetermined coefficient (Ke) at a multiplier (34) and the original image signal. As a result, an operation is carried out to multiply an error of a frame by the predetermined coefficient (Ke) to subtract it from an original image of the next frame to encode the subtracted signal to subtract its error from an original image signal of the further next frame. The value of the predetermined coefficient (Ke) is varied depending upon matching between images.

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patent: 5113255 (1992-05-01), Nagata et al.
patent: 5227877 (1993-07-01), Yukitake
patent: 5243420 (1993-09-01), Hibi

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