Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Patent
1993-06-04
1997-03-11
Chin, Stephen
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
345368, 370514, 371 42, H04L 706
Patent
active
056109512
ABSTRACT:
A device 11 includes a sync unit 20 to identify and achieve synchronization with the cell boundaries of a 53-byte ATM cell stream. Each cell starts with a 5-byte header in which the 5th byte is a CRC byte. Instead of testing all possible bytes to see whether they are cell boundaries, a CRC circuit 21 computes CRCs for successive 5-byte blocks, under the control of a 5-state header counter 22. If such a block is a header, its CRC is a predetermined value, and a match signal is sent to a logic circuit 23, which starts a 53-state cell counter 24 and stops the header counter 22. A 4-state repeat counter 25 checks that the next 5 blocks checked by the CRC circuit 21 are also headers, as confirmation. Synchronization is achieved within at most 5 cells, because the test period of the testing circuitry (which could be longer than the header length) is coprime with the cell length.
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Berent Anthony N.
Higginson Peter L.
Chin Stephen
Digital Equipment Corporation
Ghebretinsae T.
Kuta Christine M.
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