Efficient array tracing in a logic simulator machine

Details Efficient array tracing in a logic simulator machine Efficient array tracing in a logic simulator machine

2005-01-25

2005-01-25

Phan, Thai (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S022000

Reexamination Certificate

active

06847927

ABSTRACT:
A method and system are described in a logic simulator machine for efficiently creating a trace of an array which includes a plurality of storage locations. The logic simulator machine executes a test routine. Prior to executing the test routine, an initial copy of all data included within each of the storage locations of the array is stored as a first trace of the array. During execution of a first cycle the test routine, all of the write control inputs into the array are read to identify ones of the storage locations which were modified during the execution of the first cycle. A new trace of the array is generated which includes a copy of all of the data of the first trace. In addition, only those ones of the storage locations in the first trace which were modified during the first cycle are updated. A trace is thus generated by updating only those ones of the storage locations which were modified during execution of a cycle of the test routine.

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