Coded data generation or conversion – Digital code to digital code converters – Adaptive coding
Reexamination Certificate
2008-05-06
2008-05-06
Nguyen, Khai M. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Adaptive coding
C341S065000, C341S067000, C341S107000, C375S240020, C375S240210, C375S240230, C375S240240, C382S239000, C382S244000, C382S245000, C382S246000, C382S247000
Reexamination Certificate
active
11643642
ABSTRACT:
A circuit generally including a first module, a second module and a third module is disclosed. The first module may be configured to (i) generate a plurality of parsed residual blocks by parsing a plurality of 4×4 CAVLC (context-based adaptive variable length coding) residual blocks received in an input signal and (ii) generate a plurality of metric signals resulting from the parsing of the 4×4 CAVLC residual blocks. The second module configured to generate a plurality of scanning position signals based on the metric signals. The third module configured to generating an 8×8 CABAC (context-based adaptive binary arithmetic coding) residual block in an output signal by up-sampling the parsed residual blocks based on the scanning position signals.
REFERENCES:
patent: 6653955 (2003-11-01), Yang
patent: 6917310 (2005-07-01), Pearson et al.
patent: 7026961 (2006-04-01), Pearson et al.
patent: 7061410 (2006-06-01), Pearson et al.
patent: 7245242 (2007-07-01), Hu et al.
Banwait Harminder
Benzreba Jamal
Pearson Eric
LSI Logic Corporation
Maiorani P.C. Christopher P.
Nguyen Khai M.
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