Effective motion estimation for hierarchical search

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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C382S236000, C348S416100

Reexamination Certificate

active

06850569

ABSTRACT:
In the present invention, a reference block data within a current image from which a motion vector will be obtained and corresponding search region data within reproduced previous image are stored in a reference block and a search region data memory, respectively. A motion vector of two pixels unit is performed using the reference block and the search region data stored in the memory, thus resulting in obtained a motion vector of two pixels unit. At this time, the reference block and the search region data are used by performing 2:1 sampling in a horizontal direction and a vertical direction, respectively and the search range is −7˜+7. The structure of the motion search is consisted of a memory for storing a reference block (8×8) of current images and a memory (24×8) for storing a search region storing reproduced previous images. The structure further includes a processing element (PE) array block for obtaining SAD (sum of absolute difference) among candidate blocks within the search region and a block for obtaining the smallest motion vector among the candidate SADs. If hardware is implemented using the two-step search algorithm among the motion estimation of the present invention, a lot of data bandwidth of the reference memory and a memory having a large size are required. The down sampling scheme and the bandwidth of the reference memory has a structure in which a slice is previously downloaded before a pipeline when it downloads from the external memory. In an actual pipeline operation, it is implemented by the bandwidth of ⅓. Also, as it has independent memories, it can operate even at low frequency without degrading the performance.

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