Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-04-18
2006-04-18
Elms, Richard (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S185290
Reexamination Certificate
active
07031197
ABSTRACT:
An electrically erasable programmable read-only memory receives a single supply voltage and a ground voltage, and generates a first voltage higher than both the supply voltage and the ground voltage, and a second voltage lower than both the supply voltage and the ground voltage. Each memory cell in the memory has a nonvolatile storage transistor with a floating gate. To erase the memory cell, the first voltage is applied on a first side of the floating gate and th second voltage is on a second, opposite side of the floating gate. To program the memory cell, the second voltage is applied on the first side of the floating gate, and the first voltage is applied on the second side of the floating gate.
REFERENCES:
patent: 4466081 (1984-08-01), Masuka
patent: 4503524 (1985-03-01), McElroy
patent: 4586238 (1986-05-01), Yatsuda et al.
patent: 4769787 (1988-09-01), Furusawa et al.
patent: 4823318 (1989-04-01), D'Arrigo et al.
patent: 4931997 (1990-06-01), Mitsuishi et al.
patent: 4953928 (1990-09-01), Anderson et al.
patent: 5003510 (1991-03-01), Kamisaki
patent: 5022000 (1991-06-01), Terasawa et al.
patent: 5047981 (1991-09-01), Gill et al.
patent: 5077691 (1991-12-01), Haddad et al.
patent: 5079606 (1992-01-01), Yamamura et al.
patent: 5122985 (1992-06-01), Santin
patent: 5134449 (1992-07-01), Gill et al.
patent: 5146106 (1992-09-01), Anderson et al.
patent: 5155701 (1992-10-01), Komori et al.
patent: 5168335 (1992-12-01), D'Arrigo et al.
patent: 5177705 (1993-01-01), McElroy et al.
patent: 5187683 (1993-02-01), Gill et al.
patent: 5235544 (1993-08-01), Caywood
patent: 5265052 (1993-11-01), D'Arrigo et al.
patent: 5781476 (1998-07-01), Seki et al.
patent: 5844842 (1998-12-01), Seki et al.
patent: 5917752 (1999-06-01), Seki et al.
patent: 5949715 (1999-09-01), Seki et al.
patent: 5959894 (1999-09-01), Seki et al.
patent: 5991200 (1999-11-01), Seki et al.
patent: 6016273 (2000-01-01), Seki et al.
patent: 6108238 (2000-08-01), Nakamura et al.
patent: 6392933 (2002-05-01), Yoshida
patent: 2002/0159297 (2002-10-01), Yoshida
patent: 0 320 231 (1989-06-01), None
patent: 54-36446 (1979-11-01), None
patent: 54-158829 (1979-12-01), None
patent: 55-156370 (1980-12-01), None
patent: 57-96572 (1982-06-01), None
patent: 5494 (1984-01-01), None
patent: 59-16371 (1984-01-01), None
patent: 62-99996 (1987-05-01), None
patent: 62-099997 (1987-05-01), None
patent: 62-173694 (1987-07-01), None
patent: 63-188896 (1988-08-01), None
patent: 63-225999 (1988-09-01), None
patent: 01-021795 (1989-01-01), None
patent: 52300 (1989-02-01), None
patent: 01-105397 (1989-04-01), None
patent: 1-184791 (1989-07-01), None
patent: 1-236496 (1989-09-01), None
patent: 1-273296 (1989-11-01), None
patent: 01-289282 (1989-11-01), None
patent: 3-52197 (1991-03-01), None
D'Arrigo et al., 1989 IEEE International Solid-State Circuits Conference, pp. 132-133; Session 10: Non-Volatile Memories; Tham 10.3: “A 5V-Only 256k Bit CMOS Flash EEPROM.”.
N. Anantha et al., Electrically Erasable Floating Gate F.E.T. Mem. Cell, IBM Tech. Discl. Bull., vol. 17, No. 8, Jan. 1975, pp. 2311-2313.
R. Dockerty, Nonvol. Mem. Array w. Single Famos Dev. Per Cell, IBM Tech. Discl. Bull., vol. 17, No. 8, Jan. 1975, pp. 2314-2315.
M. Kikuchi et al., A 2047-Bit-N-Channel Fully Decoded Electrically Writable/Erasable Nonvol. R.O.M., 1STEuropean Solid State Circuits Conf. (ESSIRC) Kent, England, Sep. 2-5, 1975, pp. 66-67.
Haddad, et al., “Degradation Due to Hole Trapping in Flash Memory Cells”, IEEE Electron Device Letters, vol. 10, No. 3, Mar. 1989, pp. 117-119.
Elms Richard
Nguyen Hien
Oki Electric Industry Co. Ltd.
Venable LLP
Voorhees Catherine M.
LandOfFree
EEPROM writing and reading method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with EEPROM writing and reading method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and EEPROM writing and reading method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3570843