EEPROM with split gate source side injection

Details EEPROM with split gate source side injection EEPROM with split gate source side injection

1998-04-23

1999-06-08

Fears, Terrell W.

Static information storage and retrieval

Addressing

36518901, G11C 1300

Patent

active

059109254

ABSTRACT:
A novel memory structure in which memory arrays are organized in sectors with each sector being formed of a single column or a group of columns having their control gates connected in common. In one embodiment, a high speed shift register is used in place of a row decoder to serially shift in data for the word lines, with all data for each word line of a sector being contained in the shift register on completion of its serial loading. In one embodiment, speed is improved by utilizing a parallel loaded buffer register which receives parallel data from the high speed shift register and holds that data during the write operation, allowing the shift register to receive serial loaded data during the write operation for use in a subsequent write operation.

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