1989-04-28
1991-05-21
Jackson, Jr., Jerome
357 54, 357 59, H01L 2968, H01L 2934, H01L 2904
Patent
active
050179799
ABSTRACT:
A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.
REFERENCES:
patent: 4490900 (1985-01-01), Chiu
patent: 4688078 (1987-08-01), Hseih
patent: 4698787 (1987-10-01), Makherjee et al.
patent: 4794562 (1988-12-01), Kato et al.
patent: 4812898 (1989-03-01), Sumihiro
Solid State Science and Tech. '88-10.
IEEE Transactions on Electron Devices, vol. 35, No. 7, Jul. 1988.
IEEE Transactions on Electron Devices, vol. 35, No. 10, Oct. 1988.
IEEE, "Electrical Properties of Nitrided-Oxide Systems for Use in Gate Dielectrics and EEPROM".
J. Vac. Sci. Techn. B 5 (3), May/Jun. 1987.
Fujii Tetsuo
Kuroyanagi Akira
Sakai Minekazu
Jackson, Jr. Jerome
Monin D.
Nippondenso Co. Ltd.
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