EEPROM memory matrix and method for safeguarding an EEPROM...

Communications: electrical – Condition responsive indicating system – Specific condition

Reexamination Certificate

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C340S661000, C365S222000

Reexamination Certificate

active

07015821

ABSTRACT:
EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the relevant column line in each case before read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, light incidence is assumed and a corresponding alarm function is triggered. Preferably column lines adjacent to the column lines that are respectively selected for the data transmission are connected as detector lines.

REFERENCES:
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patent: 5909394 (1999-06-01), Chou
patent: 6058044 (2000-05-01), Sugiura et al.
patent: 6097624 (2000-08-01), Chung et al.
patent: 6181600 (2001-01-01), Seki et al.
patent: 0 178 512 (1986-04-01), None
patent: 0 479 461 (1992-04-01), None
patent: 0 776 012 (1997-05-01), None

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