Static information storage and retrieval – Floating gate – Particular biasing
Patent
1987-11-30
1989-08-01
Hecker, Stuart N.
Static information storage and retrieval
Floating gate
Particular biasing
365218, 357 235, 437 43, G11C 1140, H01L 2978
Patent
active
048538957
ABSTRACT:
An electrically erasable, programmable read only memory (EEPROM) having an erase window directly overlying both a control gate layer (24) and a column line (12) is disclosed. Column lines (12) are implanted into a semiconductor substrate (16) and covered with a first insulating layer (18). A floating gate layer (20) overlies the first insulating layer (18) and is covered with a second insulating layer (22). The control gate layer (24) overlies the second insulating layer (22) and is covered by a third insulating layer (26). A passage (28) extends through the third insulating layer (26), control gate layer (24) and second insulating layer (22) and contains a sidewall insulator (30) on walls thereof. A tunnel oxide (32) resides within the passage (28) and is contacted by a programming electrode layer (34) which additionally overlies the third insulating layer (26) and fills the passage (28).
REFERENCES:
patent: 4405995 (1983-09-01), Shirai et al.
patent: 4561004 (1985-12-01), Kuo et al.
patent: 4742492 (1988-05-01), Smayling et al.
patent: 4750024 (1988-06-01), Schreck
Mitchell Allan T.
Riemenschneider Bert R.
Anderson Rodney M.
Gossage Glenn A.
Hecker Stuart N.
Schroeder Larry C.
Sharp Melvin
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