EEPROM having NAND type memory cell array

Details EEPROM having NAND type memory cell array EEPROM having NAND type memory cell array

1994-09-15

1996-05-07

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular connection

36518517, 36518513, 36518522, G11C 1700, G11C 1604

Patent

active

055153240

ABSTRACT:
A NAND-cell type EEPROM comprises a memory cell array in which electrically rewritable memory cells are arranged in a matrix and a plurality of data circuits (R/W circuits in a main bit-line control circuit) for storing data to control the state of the operation of writing data into memory cells in the memory cell array. A bit-line voltage is controlled according to the writing data in the data circuit after data loading. Since the voltage on a bit line with a current leak source changes, an erroneous write operation due to a defective bit line with a current leak can be prevented by setting in the data circuit the data indicating that the bit-line voltage has been sensed after data loading. This makes it possible to effect data loading in a short time after the write mode has turned on, and to provide an easy-to-use NAND-cell type EEPROM with a high relief efficiency of defective bit lines.

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