Static information storage and retrieval – Floating gate – Particular biasing
Patent
1999-01-14
2000-06-27
Nguyen, Tan T.
Static information storage and retrieval
Floating gate
Particular biasing
36523006, G11C 1600
Patent
active
060814551
ABSTRACT:
A block decoder includes a p-well. A low voltage source is coupled to the p-well for asserting a body bias voltage to the p-well. An n-type word line pass transistor is positioned within the p-well and is coupled to a word line for passing programming voltages to the word line. A high voltage source is coupled to pass circuitry configured to assert a voltage on a gate of the pass transistor. The low voltage source is configured to apply a voltage of approximately 10 volts or more to the p-well during programming, thus reducing the voltage between the source and body region (and thus the threshold voltage as well) of NMOS transistors disposed within the p-well. Therefore, the amount of voltage needed to be applied to the pass transistors is reduced. Furthermore, the pass circuitry can work for lower supply voltages since the supply voltage is limited by the threshold voltage of the n-type transistors within the p-well.
REFERENCES:
patent: 5365479 (1994-11-01), Hoang et al.
patent: 5438542 (1995-08-01), Atsumi et al.
patent: 5654925 (1997-08-01), Koh et al.
patent: 5680349 (1997-10-01), Atsumi et al.
patent: 5844840 (1998-12-01), Le et al.
Chen Pau-Ling
Hollmer Shane C.
Le Binh Q.
Advanced Micro Devices , Inc.
Kwok Edward C.
Nguyen Tan T.
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