Edge-triggered toggle flip-flop circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S199000

Reexamination Certificate

active

06621319

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to electronic circuits, and, more particularly to bi-stable circuits for use as digital building block circuits used in electronic systems. Still more particularly, embodiments of the present invention relate to edge-triggered toggle flip-flop circuits.
BACKGROUND OF THE INVENTION
Flip-flop circuits, including edge-triggered toggle flip-flops, are used as building blocks in many digital systems including counters, parity detectors, and registers. In response to each positive
egative edge of an input, usually referred to as the clock, the flip-flop changes its state: It toggles from a ‘0’ to a ‘1’, or from a ‘1’ to a ‘0’.
The prior art has used a number of techniques to avoid constant oscillatory behavior after the input edge has passed. Thus, for example, conventional toggle flip flops are configured so that each edge of a toggle input generates a brief input pulse that is of just the right duration so that the flip flop has sufficient time to change state only once. This strategy proves unreliable, since it relies on a high degree of accuracy in pulse timing. Alternatively, two bistable elements are sometimes configured in a “master-slave” feedback-loop configuration such that one bistable element is written on one phase of the clock signal while the other holds its state and vice versa. This second strategy is reliable but inefficient in its use of circuit area in integrated circuit (IC) chip implementations, since it requires two bistable elements and a number of logic gates for its operation.
SUMMARY OF THE INVENTION
The present invention overcomes limitations of the prior art and achieves a technical advance in providing a novel edge-triggered flip-flop circuit that is reliable in its operation and efficient in its use of IC chip area. Illustrative embodiments of the present invention use only one bistable element and some simple transistor-level logic for its operation.
In a first illustrative embodiment, capacitors are alternately charged and discharged to voltages approximating supply rail values and, in combination with a small number of switches, present high or low impedance paths for input signal transitions of a predetermined polarity (illustratively positive-going), thereby to selectively communicate pulses to switches capable of initiating state transitions in a bistable element.
An alternative embodiment of the present invention provides a flip flop circuit with reduced power requirements that proves useful in a variety of low-power applications. More specifically, potentially high power consumption of large switching capacitors is avoided in a circuit that employs a pair of pass-transistor configurations to operate as switches responding to the input signal (and its complement) to connect respective capacitors to output terminals of a bistable device. In operation, the voltage on the capacitors track the corresponding output voltages when the input signal is in a given state (illustratively low), and store the value of the corresponding voltage when turned off by the (illustratively high) other state of the input signal. Then, the voltage on the capacitors and the selected input signal transition are used to effectively trigger a transition in the bistable device.


REFERENCES:
patent: 4228370 (1980-10-01), Milburn, Jr.
patent: 4508980 (1985-04-01), Puar
patent: 4680482 (1987-07-01), Obara
patent: 4803386 (1989-02-01), Kraus et al.

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