Edge triggered flip flop with multiple clocked functions

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307243, 307269, 307279, 328 48, H03K 513, H03K 3353, H03K 1718, H03K 1726

Patent

active

042245338

ABSTRACT:
A single flip flop is integrated with MOS circuitry which enables the single flip flop to be triggered by each of several individual clocked functions without interfering with one another. The flip flop responds only to low to high transitions of each clock signal input. This is accomplished by feeding back the flip flop output to each trigger circuit in such a way as to temporarily disconnect the trigger circuit from the flip flop during the time period between two successive low to high transitions of a particular clock signal, so that the flip flop can be triggered by other clocked functions without interference from the particular clock signal.

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Pomeranz, "Complementary Metal-Oxide Semiconductor J-K Flip-Flop & Shift Cell"; IBM Tech. Discl. Bull.; vol. 16, No. 11, pp. 3613-3614; 4/74.
MacFarlane, "Pulse Generator and Flip-Flops"; IEEE Trans. on Instrumentation & Measurement; vol. IM-21, No. 2, pp. 148-153; 5/72.

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