Edge termination for zener-clamped power device

Active solid-state devices (e.g. – transistors – solid-state diode – Avalanche diode – With means to limit area of breakdown

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Details

257603, 257355, 257551, 257481, H01L 29861, H01L 31107, H01L 2362

Patent

active

059593458

ABSTRACT:
A semiconductor power device (100) that includes a number of bipolar or FET power devices (116), an over-voltage clamp (118), and an edge termination structure (110) that separates the power devices (116) and the over-voltage clamp (118). The power devices (116) are formed in an interior region (100a) of a semiconductor substrate (128), while the over-voltage clamp (118) is formed in a peripheral region (100b) of the substrate. The over-voltage clamp (118) and the gate/base terminals of the power devices (116) are formed in a polysilicon layer (126) overlying the substrate (128), such that the over-voltage clamp (118) is connected between the anode and gate/base terminals of each power device (116) to provide over-voltage protection. The edge termination structure (110) is formed in the substrate (128) so as to completely surround the interior region (100a) of the substrate (128), and therefore surrounds the power devices (116) to form a continuous barrier structure between the power devices (116) and the over-voltage clamp (118). The edge termination structure (110) includes a main junction (112) and at least one field-limiting ring (114), each of which is formed by a continuous well of the same electrical conductivity type. The edge termination structure (110) also includes a pair of field plates, a first (142) of which contacts the field-limiting ring (114) and a second (138) contacts the polysilicon layer (126) so as to make electrical contact with a gate terminal of the main junction (112).

REFERENCES:
patent: 5397914 (1995-03-01), Suda et al.
patent: 5475258 (1995-12-01), Kato et al.
patent: 5502338 (1996-03-01), Suda et al.
patent: 5545915 (1996-08-01), Disney et al.

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