Edge synchronized phase-locked loop circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

Reexamination Certificate

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Details

C331S016000, C327S141000, C327S156000, C327S159000, C375S376000

Reexamination Certificate

active

06891441

ABSTRACT:
A phase-locked loop circuit for synchronizing an edge of an output signal with an edge of an input signal. The circuit detects an edge of an input clock signal, and a corresponding edge on an output signal. If the output signal edge is out of phase with the input clock edge, the circuit shifts the output signal by 180 degrees to effectively produce a single double-length clock phase. The synchronized phase-locked loop circuit provides predictable phase-locked loop output phase synchronization with an input clock.

REFERENCES:
patent: 4535306 (1985-08-01), Yamaguchi et al.
patent: 5703539 (1997-12-01), Gillig et al.
patent: 6326826 (2001-12-01), Lee et al.
patent: 6819729 (2004-11-01), Takagi
patent: 490178 (1992-06-01), None

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