Edge-synchronized clock recovery unit

Pulse or digital communications – Synchronizers – Self-synchronizing signal

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Details

375359, 375361, 375373, 327142, 327160, 331 1A, 331 34, H04L 702

Patent

active

057612552

ABSTRACT:
A clock recovery unit for recovering a clock embedded in a data communication is disclosed. The clock recovery unit includes an oscillator (50) operating at a frequency close to that of the clock embedded in the data communication. The clock recovery unit also includes an edge detector (30) that produces a synchronization pulse with each transition in the data communication. The edge detector is coupled to the oscillator to force a transition in the oscillator in synchronization with the synchronization pulse produced by the edge detector. A start-up latch (10) that starts and stops the oscillator also forms part of the clock recovery unit. The start-up latch starts the oscillator at the beginning of the data communication, with no preamble bits required. For low-power consumption in stand-by mode, a counter (40) coupled to the start-up latch stops the oscillator after data has been determined not to be present for a preset period of time. Preferably, the start-up latch, edge detector, counter, and oscillator are incorporated into an Application Specific Integrated Circuit (ASIC).

REFERENCES:
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patent: 5072445 (1991-12-01), Nawata
patent: 5600682 (1997-02-01), Lee
M. Banu and A. E. Dunlop, Clock Recovery Circuits with Instantaneous Locking, Electronics Letters, Nov. 5, 1992, pp. 2127-2130.
AT&T Microelectronics, Using the T7032 Clock Recovery and Data Retiming Circuit, Technical Note, Jan. 1992.
AT&T Microelectronics, T7032 Clock Recovery and Data Retiming Circuit, Data Sheet, Jan., 1992.
AT&T Microelectronics, T7035 Clock Recovery and Data Retiming Circuit, Data Sheet, Oct. 1992.
Analog Devices, Clock Recovery and Data Retiming Phase-Locked Loop, AD803.
Analog Devices, Clock Recovery and Data Retiming Phase-Locked Loop, AD800/AD802.
Analog Devices, Data Retiming Phase-Locked Loop, AD805.

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