Edge set/reset latch circuit having low device count

Details Edge set/reset latch circuit having low device count Edge set/reset latch circuit having low device count

1987-11-02

1989-02-21

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307448, 307451, 3072721, H03K 326, H03K 3284, H03K 1716

Patent

active

048067865

ABSTRACT:
A latch circuit is provided which may be set to a predetermined logic state in response to a positive transitioning edge of a set signal and reset to an opposite logic state in response to a negative transitioning edge of a rest signal. A master circuit portion receives the set and reset signals and provides a control signal in response to the set and reset signals and the output signal. A slave circuit portion receives the control signal and provides the output signal in response to the control signal and the set and reset signals. By multiplexing set and reset enabling functions with common circuitry, a reduced amount of circuitry is required.

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