Edge sensitive set-reset flip flop

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307205, 307279, 307289, 328195, H03K 3286, H03K 3353

Patent

active

039769496

ABSTRACT:
An edge sensitive set-reset flip-flop is implemented by providing a conventional cross-coupled coincident gate flip-flop with an input means consisting of an inverter, a noninverting delay element and a coincident gate. The input means buffers binary input signals such that the cross-coupled coincident flip-flop will change state only in response to binary transitions of a prescribed direction.

REFERENCES:
patent: 3234401 (1966-02-01), Dinman
patent: 3515901 (1970-06-01), White
patent: 3613017 (1971-10-01), Howells
patent: 3753014 (1973-08-01), Kronies et al.
patent: 3757231 (1973-09-01), Faustini
Walker, "Design Flip-Flops from LSI Cells"; Electronic Design 12, 6/6/1968; pp. 82-86.

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