Edge rate control for 1 2 C bus applications

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...

Reexamination Certificate

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C327S024000

Reexamination Certificate

active

07733142

ABSTRACT:
Consistent with an example embodiment, an edge-rate control circuit arrangement (300) for an I2C bus application comprises a first circuit stage (10, M1, M3), responsive to a state transition of a received signal. A second circuit stage (310, 25, 20, 35, 45, M4, ESD) is responsive to the state transition of the received signal and includes drive circuitry (M4) that is activated in response to the state transition of the received signal in order to provide an edge-transition signal for an I2C bus, and regulation circuitry (310, R1, R2, M0, M2) adapted to control the drive circuit and regulate a transition rate for the edge-transition signal, the transition rate being greater than a transition rate of the received signal at the first circuit stage and greater than a minimum and less than a maximum transition rate designated for communication on the I2C bus.

REFERENCES:
patent: 4689740 (1987-08-01), Moelands et al.
patent: 5557223 (1996-09-01), Kuo
patent: 5559502 (1996-09-01), Schutte
patent: 5818260 (1998-10-01), Kuo
patent: 5883531 (1999-03-01), Kuo
patent: 2003/0107909 (2003-06-01), Nakamura
patent: 0368524 (1990-05-01), None
patent: 0596475 (1993-05-01), None

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