Television – Image signal processing circuitry specific to television – Special effects
Reexamination Certificate
1998-07-01
2001-09-25
Eisenzopf, Reinhard J. (Department: 2614)
Television
Image signal processing circuitry specific to television
Special effects
C348S591000, C348S593000, C348S587000, C348S600000, C348S625000, C382S266000, C382S268000, C345S111000, C345S111000, C345S111000, C345S111000, C345S182000
Reexamination Certificate
active
06295096
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an edge key generating method and apparatus for generating edges for a key signal used to superimpose character or image information on an image signal.
BACKGROUND OR THE INVENTION
An image or characters may be superimposed on an image signal as special effect processing. In this case, a key signal is used that specifies the shape (range) of an image to be cut out for superimposition and the amount (intensity) of the image.
If an image contains, for example, a human being against a blue background (such an image is referred to as a 0chromakey), the key signal distinguishes that human being from the blue background. The key signal specifies a cut-out image area (for example, the area of the human being) as “1” and the blue background as “0”. Edges are added to the periphery of the cut-out image area in the key signal.
A conventional edge key generating apparatus is configured as shown in FIG.
8
.
In this figure,
30
is an input terminal through which an image signal for superimposition is input;
31
is a Y/C separation circuit that separates the image signal (in which, for example, a luminance signal (hereafter referred to as “Y” ) and a color signal (hereafter referred to as “C”) are time-axis-multiplexed) into Y and C;
32
is a key signal generating circuit that generates a key signal based on the weights .of the respective signals provided by the Y/C separating circuit
31
;
33
is a filter that removes ringing from the key signal;
34
is an edge generating circuit that generates (adds) edges of a desired width to the key signal from which the filter
33
has cut out harmonic components; and
35
is an output terminal through which the key signal is output to which the edges have been added.
For character superimposition, the key signal generating circuit
32
generates a key signal based on the level of Y, and if the characters have colors, a key signal is generated taking the color signal into consideration.
The edge generating circuit
34
is configured as shown in FIG.
9
.
FIG. 9
is a simplified drawing of a configuration used to generate edges in the vertical direction. A key signal output from a filter
33
is input through a terminal
36
. In a 1H delay circuit
37
that delays a signal by one horizontal scanning period (hereafter referred to as “1H”), the key signal is delayed by 1H. A 1H delay circuit
38
further delays the signal by 1H. Signals for three lines from the terminal
36
and 1H delay circuits
37
and
38
are input to a maximum-value selector
39
to select a signal having a maximum amplitude level, which is then output from a terminal
40
.
If, for example, a key signal (the shaded part) is in the n-th line ((n) is an integer) of an image signal as shown in
FIG. 10
a
, then in the output from the edge generating circuit
34
shown in
FIG. 9
, an edge is added to one line located above and below the n-th line, respectively as shown in
FIG. 10
b.
Specifically, in the configuration shown in
FIG. 9
, the edge generating circuit
34
provides a 1H delay, so when a signal for the n-th line is input to the terminal
36
, the (n−1)-th line is output from the 1H delay circuit
37
and the (n−2)-th line is output from the 1H delay circuit
38
. Thus, as the output of the signal of the (n−1)-th line from the maximum-value selector
39
, the signal from the terminal
36
, that is, the key signal is selected.
Likewise, when the (n+1)-th line is input to the terminal
36
, selection is made among (n+1)-th, (n)-th, and (n−1)-th lines, and when the (n+2)-th line is input to the terminal
36
, selection is made among the (n+2)-th, (n+1)-th, and (n)-th lines.
An example of a configuration of an actual edge generating circuit
34
is shown in FIG.
11
.
The configuration shown in
FIG. 11
can add edges to four lines above and below the key signal. A key signal is input through a terminal
41
and is sequentially delayed by 1H delay circuits
43
to
50
via a one-field FIFO memory having one field of storage capacity in order to provide signals for nine lines.
In this circuit, the output from the 1H delay circuit
46
is used as a reference line, so the signal is delayed by 4H relative to the output from the one-field FIFO memory
42
. The key signal with edge addition must be timed to an image signal for superimposition. Thus, the one-field FIFO memory is adjusted to delay the signal by one-field period including the 4H delay.
The outputs from the one-field FIFO memory
42
, 1H delay circuits
43
to
45
, and 1H delay circuits
47
to
50
are multiplied by &agr;1 to &agr;8 by multipliers
51
to
58
respectively. The outputs from the multipliers
51
to
58
and 1H delay circuit
46
are input to a maximum-value selection circuit
59
to select one of the signals for nine lines which has a maximum amplitude, which is output from a terminal
61
as the key signal to which edges have been added.
A control signal is input to the maximum-value selector
59
from a terminal
60
. The control signal controls the method for adding edges, that is, specifies the number of edges to be added and the addition of both upper and lower edges, only upper edges, only lower edges, or no edges. Selection among the signals for nine lines causes four edges to be added above and below the key signal, and selection among the 1H delay circuits
46
to
50
causes four edges to be added below (above?) the key signal.
In addition, coefficients &agr;1 to &agr;8 applied to the multipliers
51
to
58
control the method for adding edges. When, for example, &agr;1 =0.2, &agr;2 =0.4, &agr;3 =0.6, &agr;4 =0.8, &agr;5 =0.8, &agr;6 =0.6, &agr;7 =0.4, and &agr;8 =0.2, soft-edge processing is executed in which the edges added before and after the key signal (in the upper and lower parts of an image) vary on a step-by-step basis as shown in
FIG. 12
a
. In addition, if &agr;1 to &agr;8 are all 1, hard edge processing is executed in which the edges added before and after the key signal are all at the same level as shown in
FIG. 12
b.
Since such a conventional edge key generating apparatus is designed to generate edges for an image signal for interlaced scanning as in NTSC image signals, it is not affected by gaps between edges caused by the absence of the key signal in the subsequent field as shown in FIG.
10
.
Attempts, however, are now made to put to practical use television broadcasting using progressive scanned image signals. A progressive scanned image signal carries one frame of image in one conventional field, thereby, for example, doubling the number of required horizontal scanning lines.
Consequently, to reduce the required transmission band, broadcasting studios use a transmission method that separates a progressive image signal into two.
FIG. 13
shows a separation method used in transmitting a progressive image signal that is separated into two. In this figure, a frame (for example, one frame lasts one-thirtieth seconds) is divided into links A and B (a main link and a sub-link) for each horizontal scanning line. When one frame corresponds to
525
horizontal scanning lines, the positions of the links A and B are reversed during the subsequent frame. Thus, if only the signal of the link A or link B is considered, it is the same as an interlaced image signal so a conventional apparatus for interlaced image signals can be used in this case.
If, however, a conventional edge key generating apparatus is applied to each of the links A and B, although all the signals are contained in the same frame, gaps between the edges are clearly recognized, resulting in striped edges.
If, for example, the signal shown in
FIG. 10
is assumed to be a progressive image signal, the lines (n) and (n+1) are signals of the link A, whereas the line between these lines is a signal of the link B within the same frame. As a result, if edges are added to the signals of the links A and B using an edge key generating apparatus, follow
Okuda Nobukatsu
Yamada Yoshiki
Eisenzopf Reinhard J.
Matsushita Electric - Industrial Co., Ltd.
Natnael Paulos M.
Parkhurst & Wendel L.L.P.
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