Edge evaluation of ASK-modulated signals

Pulse or digital communications – Synchronizers – Self-synchronizing signal

Reexamination Certificate

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C455S130000, C329S347000

Reexamination Certificate

active

08081725

ABSTRACT:
Signal processing circuit including a demodulator that receives a receive signal with signal edges, and outputs a demodulated receive signal with transitions from a first level to a second level or vice versa at signal edges of the receive signal, wherein points of time of the transitions depend on the steepnesses of the signal edges. The circuit also includes an edge evaluator that receives the receive signal, and outputs an evaluation signal which includes information about the steepnesses of the signal edges. The circuit also includes a signal generator that receives the output of the demodulator, receives the output of the edge evaluator, and outputs a corrected demodulated receive signal with transitions whose points of time are set with regard to the points of time of the transitions of the demodulated receive signal based on the evaluation signal in order to reduce influences of different steepnesses of the signal edges.

REFERENCES:
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patent: 2006/0028342 (2006-02-01), Choi et al.
patent: 2007/0025421 (2007-02-01), Shattil
patent: 2008/0026712 (2008-01-01), Leutgeb et al.
patent: 2008/0246541 (2008-10-01), Kranabenter
patent: 199 27 320 (2000-12-01), None
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patent: 1 231 557 (2002-08-01), None

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