Edge arrangements for integrated circuit chips

Details Edge arrangements for integrated circuit chips Edge arrangements for integrated circuit chips

2006-08-08

2006-08-08

Fahmy, Wael (Department: 2814)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S113000, C438S460000, C438S462000, C438S463000

Reexamination Certificate

active

07087452

ABSTRACT:
A method is provided for forming microelectronic devices. This may include providing a wafer device having metallization layers, a plurality of integrated circuits and a channel area provided around each of the integrated circuits. Materials from within each channel area may be removed by etching or by laser to form an air gap around a perimeter of each integrated circuit. Each air gap may prevent cracking and/or delamination problems caused by a subsequent dicing of the wafer device by a wafer saw into a plurality of devices.

REFERENCES:
patent: 5024970 (1991-06-01), Mori
patent: 6022791 (2000-02-01), Cook et al.
patent: 6383893 (2002-05-01), Begle et al.
patent: 6794272 (2004-09-01), Turner et al.

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