ECL/TTL translator circuit

Details ECL/TTL translator circuit ECL/TTL translator circuit

1991-11-08

1993-07-13

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307456, 307542, 307546, 307354, H03B 104, H03K 190175

Patent

active

052276805

ABSTRACT:
An ECL/TTL translation circuit for translating ECL level input signals, which have a high voltage state and a low voltage state, to TTL level output signal, which have a high voltage state and a low voltage state. The translation circuit includes an ECL input circuit, a level shifter, and a TTL output circuit. The ECL input circuit receives the ECL level input signals and generates an intermediate voltage signal corresponding to the ECL level input signal. The level shifter is coupled to the ECL input circuit and maintains the intermediate voltage signal in a desired range of voltages. The TTL output circuit receives the intermediate voltage signal and generates a TTL output signal that corresponds to the intermediate voltage signal and, therefore, corresponds to the ECL input signal.

REFERENCES:
patent: 4782248 (1988-11-01), Overs
patent: 4874970 (1989-10-01), Coy et al.
patent: 4996452 (1991-02-01), Yee et al.
patent: 5045729 (1991-09-01), Yee et al.

Affiliated with

Also associated with

Rating

ECL/TTL translator circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with ECL/TTL translator circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ECL/TTL translator circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2314500