ECL/TTL-CMOS translator bus interface architecture

Details ECL/TTL-CMOS translator bus interface architecture ECL/TTL-CMOS translator bus interface architecture

1989-09-29

1991-06-11

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307413, H03K 19094, H03K 1730

Patent

active

050234870

ABSTRACT:
Described is an architecture for translating between ECL and TTL/CMOS signal levels in which the control signal applied to the translating circuitry is of the same type as the output signal of the device in which the architecture is used.

REFERENCES:
patent: 3986045 (1976-10-01), Lutz
patent: 4472647 (1984-09-01), Allgood et al.
patent: 4527079 (1985-07-01), Thompson
patent: 4563601 (1986-01-01), Asano et al.
patent: 4677320 (1987-06-01), Hannington
patent: 4697109 (1987-09-01), Honma et al.
patent: 4890019 (1989-12-01), Hoyte et al.
patent: 4931672 (1990-06-01), Khan

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