ECL to TTL voltage level converter using CMOS and BiCMOS circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307446, 307570, 307448, 307451, H03K 19092, H03K 19094

Patent

active

050755811

ABSTRACT:
Additional transistors are serially inserted in a level conversion circuit that configures a flip-flop with N channel transistors and P channel transistors and that outputs TTL level output signals by converting ECL level input signals, so that said additional transistors are turned OFF at the same time as the P channel transistors, connected serially with the N channel transistors, are turned ON. This above described process will prevent a through current flowing between positive and negative power sources, when transistors are switched, thus preventing an increase in the current consumed.

REFERENCES:
patent: 4471242 (1984-09-01), Noufer et al.
patent: 4485317 (1984-11-01), Davies, Jr.
patent: 4486670 (1984-12-01), Chan et al.
patent: 4514651 (1985-04-01), Miller et al.
patent: 4532436 (1985-07-01), Bismarck
patent: 4677320 (1987-06-01), Hannington
patent: 4716312 (1987-12-01), Mead et al.
patent: 4931673 (1990-06-01), Naghshinel

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