ECL To TTL output stage

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307264, 307456, H03K 19092, H03K 19088, H03K 19086

Patent

active

045146519

ABSTRACT:
In a circuit for converting signals having ECL logic levels to a signal having TTL logic levels, the level shift is accomplished using the base-emitter drops of the transistors employed to avoid the speed degradation that accompanies the use of resistors as level shifters. First and second complementary input ECL signals are applied to first and second transistors respectively. The first input signal results in rendering a drive transistor conductive which turns the source transistor means in a push-pull output stage off and the sink transistor in the output stage on. When the second input signal goes high, current is diverted so as to render the drive transistor nonconductive. Additional circuit means are provided for preventing the sink transistor from saturating and for preventing the input of the source transistor means from falling below a predetermined level. Circuit means are also provided for turning the source transistor means off quickly so as to improve the overall speed performance of the circuit.

REFERENCES:
patent: 4174541 (1979-11-01), Schmitz
patent: 4321490 (1982-03-01), Bechdolt
patent: 4368395 (1983-01-01), Taylor

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