ECL to BiCMIS level converter

Details ECL to BiCMIS level converter ECL to BiCMIS level converter

1992-06-18

1993-10-19

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, H03K 19092

Patent

active

052548872

ABSTRACT:
A level converter is of a three-stage circuit arrangement composed of an ECL circuit, a pair of emitter followers and a pair of level converting circuits. Each level converting circuit converts the logic level of an output signal from the ECL circuit into the logic level of a MIS or BiMIS output signal. Each level converting circuit has an input stage comprising an inverter composed of a P-type MIS transistor and an N-type MIS transistor, whose gates are supplied with the input signal, to be converted in level, from the ECL circuit. The small amplitude of the supplied input signal is fully swung to completely turn on or turn off a bipolar transistor in the output stage of the level converting circuit, thereby producing an output signal of MIS or BiMIS logic level. Each level converting circuit also has a discharge circuit to quickly drain input and output stage signals and an MIS transistor or bipolar transistor, to shorten the time delay which the input signal suffers when transmitted through the level converter. The discharge circuit and the MIS transistor or bipolar transistor also effectively reduce the steady current flowing through the level converting circuit.

REFERENCES:
patent: 4906871 (1990-03-01), Iida
patent: 5027323 (1991-06-01), Miyamoto et al.
patent: 5070261 (1991-12-01), Ten Eyck
patent: 5075579 (1991-12-01), Ueno
patent: 5101125 (1992-03-01), Hara et al.
patent: 5124581 (1992-06-01), Imeki
patent: 5132573 (1992-07-01), Tsuru et al.
patent: 5162677 (1992-11-01), Takahashi

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