ECL logic gate with voltage protection

Details ECL logic gate with voltage protection ECL logic gate with voltage protection

1992-04-03

1993-10-26

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307362, 307475, H03K 19003, H03K 19086, H03K 190175

Patent

active

052569179

ABSTRACT:
An ECL logic gate (70) includes a voltage protection clamp (60) for protecting a first bipolar transistor (58) from being too heavily reverse biased when an input signal A.sub.IN is pulled to V.sub.SS. The ECL logic gate (70) includes an emitter-follower input stage and a differential amplifier stage. A voltage protection clamp (60) includes a second transistor (52) and a resistor (53) and acts to divide the amount of reverse bias on the first bipolar transistor (58) between a third transistor (51) and the first transistor (58), thereby bringing the reverse bias voltage on the first transistor (58) within acceptable levels to prevent degradation of the first transistor (58).

REFERENCES:
patent: 4864166 (1989-09-01), Gloaguen
patent: 4967106 (1990-10-01), Tamegaya
patent: 5162677 (1992-11-01), Takahashi
Burnett and Hu, "Hot-Carrier Degradation in Bipolar Transistors at 300 and 110k-Effect on BiCMOS Inverter Performance", IEEE Trans. on Elec. Dev., vol. 37, No. 4, Apr. '1990, pp. 1171-1173.
Blood, "MECL System Design Handbook", 4th Ed., 1988, FIG. 1-1a, p. 1.

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