ECL latch circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

3072723, 3072721, H03K 1920, H03K 301

Patent

active

053348877

ABSTRACT:
An ECL latch circuit includes a logic section and has a reset or set function. The logic section includes a first to seventh transistors. The third transistor has a collector connected to the collector of the first transistor, and a base for receiving a first reference potential or the collector potential of the second transistor through an emitter follower section. The fourth transistor has a collector connected to the collector of the second transistor, a base for receiving a collector potential of the first transistor through an emitter follower section or receiving a first reference potential, and an emitter connected to the emitter of the third transistor. The fifth transistor has a collector connected to the collector of the second or first transistor, a base for receiving a reset or set signal, and an emitter connected to the emitter of the third transistor.

REFERENCES:
patent: 4877977 (1989-10-01), Kokado
patent: 5155383 (1992-10-01), Barbera
patent: 5170079 (1992-12-01), Komatsu
patent: 5220212 (1993-06-01), Sinh
patent: 5237220 (1993-08-01), Kurashima
Jerry Prioste et al., "MCA2500ECL and MCA800ECL Macrocell Array Design Manual", Motorola Inc., 1986.

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