ECL circuit with a reduced power active pulldown

Details ECL circuit with a reduced power active pulldown ECL circuit with a reduced power active pulldown

1990-11-30

1992-09-08

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307475, H03K 1704

Patent

active

051461161

ABSTRACT:
In an ECL circuit comprising a differential type switching circuit having first and second output terminals, a first transistor connected to a first power source, a second transistor connected to a second power source, and a capacitor connected between the second output terminal of the switching circuit and the base of the second transistor, the ECL circuit further comprises a constant current source connected between the first power source and the base of the second transistor, and an impedance connected between the base of the second transistor and the second power source. In the above ECL circuit, the base of the second transistor is biased by means of a circuit constituted by the constant current source and the impedance and the static current flowing in the second transistor can be stably maintained by using a constant current source which can be easily obtained in the prior art as the above constant current source. Further, since the base potential of the second transistor can be determined by the second power source potential of the constant current source, the power consumption can be reduced by adequately setting the second power source potential. In addition, since the base impedance of the second transistor can be set to be higher than the base impedance of the transistor Q5 in the conventional circuit shown in FIG. 1, charges injected into the base of the second transistor via the capacitor may effectively function, causing the driving ability of the second transistor to be enhanced.

REFERENCES:
patent: 4539493 (1985-09-01), Varadarajan
patent: 4577125 (1986-03-01), Allen
patent: 4629913 (1986-12-01), Lechner
patent: 4680480 (1987-07-01), Hopta
patent: 4684831 (1987-08-01), Kruest
patent: 4687953 (1987-08-01), Varadarajan
patent: 4737663 (1988-04-01), Varadarajan
patent: 4835420 (1989-05-01), Rosky
patent: 4906869 (1990-03-01), Masuoka
patent: 4926065 (1990-05-01), Coy et al.
patent: 4999520 (1991-03-01), Usami et al.
Toh et al., "A 23-ps/2.1 mW ECL Gate with an AC-Coupled Pull-Down Emmitter-Follower Stage", IEEE Journal of Solid State Circuits, vol. 24, No. 5, New York: Oct. 1989, pp. 1301-1306.

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