ECL Circuit having a negative feedback differential transistor c

Details ECL Circuit having a negative feedback differential transistor c ECL Circuit having a negative feedback differential transistor c

1982-11-12

1986-01-07

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, H03K 19086, H03K 19092, H03K 19013

Patent

active

045636001

ABSTRACT:
An ECL semiconductor integrated circuit is constructed of an input circuit, a minor amplitude ECL circuit and an output circuit. The input circuit has its operating speed improved by using a negative feedback type differential transistor circuit. Thanks to the improvement in the operating speed of the input circuit, the overall response time of the ECL semiconductor integrated circuit can be significantly shortened. The output circuit is arranged to operate in conjunction with a minor amplitude signal received from the ECL circuit, and can include provisions both for generating minor level signals for the ECL and an output circuit at a normal ECL level for coupling to external circuit operating at such a normal level. Also, in one embodiment, the output circuit can operate with a negative feedback type differential transistor circuit to increase the operating speed of the output circuit.

REFERENCES:
patent: 3404285 (1968-10-01), Hazlett
patent: 3501647 (1970-03-01), Giacomo
patent: 3648064 (1972-03-01), Mukai et al.
patent: 4329597 (1982-05-01), Yamagiwa
patent: 4453095 (1984-06-01), Wrathall
Yoshitaka Itou, et al, "ECL LSI Circuit Design", Review of the Electrical Communication Laboratories; vol. 26, Nos. 9-10, pp. 1339-1354, Sep.-Oct. 1978.

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