Echo canceller using two residual echoes

Multiplex communications – Wide area network – Packet switching

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379410, 379406, H04L 514

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active

053155858

ABSTRACT:
In an echo canceller having PCM interfaces used in a PCM telephone circuit, an echo estimator (6) is coupled with a receive path through a linear code converter (13) for obtaining a linear receive input signal, and a first subtractor (7) is inserted after a linear code converter (13) in a transmit path for cancelling an echo component in a linear transmit input signal and for transmitting a first residual echo to the far-end talker. A non-linear quantization processor (24) is inserted between the first subtracter (7) and the echo estimator (6), and produces a new echo estimate containing quantization noise, based on an echo estimate which is derived from the echo estimator (6). The filter coefficients in the echo estimator (6) are updated by using the second residual echo obtained by the second subtracter (23) separately prepared from the first subtracter (7). The new echo estimate from the non-linear quantization processor (24) can drastically cancel not only the echo but also the quantization noise in the linear transmit input signal without any effect on the performance of the echo estimator (6). The echo canceller having the non-linear quantization processor (24) and subtracters separately prepared for transmitting the first residual echo to the far-end talker and for updating the echo estimator (6) can achieve a high echo return loss enhancement even for a multi-linked PCM channel.

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patent: 5263020 (1993-11-01), Yatsuzuka et al.
"A Cascadable VLSI echo Canceller", Tao et al, IEEE Journal on Selected Areas in Communications, vol. SAC-2, No. 2, Mar. 1984, pp. 297-303.
"Echo Canceler with Two Echo Path Models", Ochiai et al, IEEE Transactions on Communicaitons, vol. COM-25, No. 6, Jun. 1977, pp. 589-595.

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