Echo canceller apparatus

Telephonic communications – Subscriber line or transmission line interface – Network interface device

Patent

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Details

379406, 379408, 370292, H04M 900

Patent

active

060647337

ABSTRACT:
An echo canceller apparatus consists of a frame aligner circuit and an echo canceller. The frame aligner circuit forcibly generates a data slip of a receive input signal by a recursive buffer of a FIFO when a slip between timings of receive and transmit clocks is accumulated. A data slip detection circuit outputs its detection of the data slip to an adaptation correction section of the echo canceller. In the adaptation correction section, when the data slip of the receive input signal is detected depending on the output of the data slip detection circuit, a correction operation is performed so that a delay by N taps is increased in an impulse response of an H-register, thereby canceling an echo.

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patent: 5481564 (1996-01-01), Kakuishi et al.
patent: 5848061 (1998-12-01), Hasegawa

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