Echo canceller

Multiplex communications – Wide area network – Packet switching

Patent

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Details

379410, 379406, H04L 514, H04B 323

Patent

active

052475123

ABSTRACT:
In an echo canceller having PCM interfaces used in a PCM telephone circuit, an echo estimator (65) is coupled with a receive path through a linear code converter (632) for measuring a linear receive input signal, and a subtracter (7) is inserted after a linear code converter (631) in a transmit path for cancelling an echo component in a linear transmit input signal. The same procedure as that in a conventional echo canceller is performed in a divergent situation in the echo estimator (65) in which a large step gain is assigned, and in a convergent situation in the echo estimator (65) in which a relatively small step gain is assigned, a non-linear quantization processor (27,271) is inserted between the subtracter (7) and the echo estimator (65). The non-linear quantization processor (27,271) produces a new echo estimate containing a quantization noise, based on an echo estimate which is derived from the echo estimator (65). The new echo estimate can cancel not only the echo but also the quantization noise in the linear transmit input signal. The echo canceller having the non-linear quantization processor (27,271) can achieve a high echo return loss enhancement even for a multi-linked PCM channel.

REFERENCES:
patent: 4805215 (1989-02-01), Miller
patent: 5029204 (1991-07-01), Shenoi et al.
patent: 5148427 (1992-09-01), Buttle et al.

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